• IBM nanosheets promise better speed and battery life for next-gen chips

    If IBM finds a manufacturer willing to license its approach, improvements in processor performance could arrive in 2024 or 2025.
    IBM Research has developed new chip manufacturing technology that it says will bring processors to new levels of circuit miniaturization, performance improvements and power efficiency. But to achieve that, it must find manufacturing partners to bring the technology to market.
     
    IBM said Thursday that new manufacturing techniques using nanosheet components could increase chip performance by 45 percent or reduce power consumption by 75 percent compared with the technology used to make IBM server chips or Apple iPhone chips. The company expects the technology to be available in processors in 2024 or 2025, two generations ahead of the state-of-the-art processes currently used by today's manufacturing leader Taiwan Semiconductor Manufacturing Company (TSMC).
     
    IBM's approach uses the same basic chip-making technique that has been used for decades: Carefully arranged patterns of light beams are projected onto silicon wafers, etching patterns that become data-processing circuit elements called transistors.  Continuous improvements have allowed chipmakers to gradually shrink the size of these transistors, allowing processors once powered for room-sized mainframes to now power smartwatches.
     
    The new method uses two structures. The first are nanosheets, thin, flat wires that carry electrical current across transistors. Second is the new design of the gate, the transistor component that turns the current on or off. IBM uses full-gate technology, completely surrounding each nanosheet with gate material to prevent current leakage.
     
    "We have the transistor devices to do this, and we're seeing improvements in performance," said Dario Gil, head of IBM Research, which licenses its chip technology to manufacturers. "The entire industry will use this transistor technology."
     
    Chip progress is important. Reducing power consumption is critical for mobile devices with limited batteries, while improving performance can make applications faster and more powerful. Shrinking transistors means more circuitry is needed to enable faster graphics, artificial intelligence processing and other specialized hardware functions.
     
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    2nm manufacturing process
    The company on Thursday demonstrated a new method for mounting silicon wafers with rectangular chips. IBM Research is building test chips at its semiconductor research facility in Albany, NY, a choice that could find favor with politicians eager to restore US chipmaking prowess.
     
    Chipmakers refer to their manufacturing processes in terms of ultra-small dimensions of nanometers (billionths of a meter). For example, a DNA strand is 2 nanometers wide. For chip manufacturing, smaller nanometers indicate progress in miniaturization, although the term is used today primarily as a label rather than an actual measurement.
     
    The most advanced manufacturing process today is TSMC's 5nm process. Much of the industry is still using 7nm or earlier processes. Next up is 3nm. IBM labels its new process 2nm. Each step along this path is called a manufacturing node.
     
    Now that we've run out of nanometers, it's unclear what labels will come next, especially since the numbers are no longer true measurements.
     
    Gill suggested that maybe we would use angstroms instead—a measurement of one-tenth of a nanometer. But he laughed off the idea because today's labels are divorced from real measurements.
     
    “Since 65 nanometers, the numbering of nodes no longer makes sense,” Gill said. “From that point on, all it really means is the name of the next node two years from now.”
     
    Other chipmakers are already working on full-gate
    It's unclear how the technology will be brought to market, as IBM no longer makes its own processors.
     
    IBM Research 2nm chip wafers Real World Insights principal analyst David Kanter said the world's three largest chip manufacturers - Intel, TSMC and Samsung - all have their own research plans and are likely already working on gate-all-around technology. "Every major player clearly has a plan for this."
     
    Samsung demonstrated its all-gate technology at a conference in February, and Intel, like IBM,  IBM Servers  battery is working on stacking multiple layers of nanosheets into each transistor.
     
    However, IBM has partnerships with major chipmakers. Samsung makes IBM server processors, and the IBM research alliance is part of new Intel CEO Pat Gelsinger's plan to turn around years of Intel problems.
     
    Another challenge IBM faces is proving that its technology can work in high-volume manufacturing outside the lab, where cost and consistency are critical.
     
    "For semiconductor manufacturing, simply doing R&D and proving it is very different than proving it at scale," Kanter said.

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